SemTest Power Semiconductor Reliability ATE

Output

Models

Part numbers in crawlable text — searchable, linkable, and quotable by model.

Capabilities

• Individual DUT control and measurement — per-DUT current monitoring cuts supply voltage on limit while all other DUTs continue testing
• Automated reversal of high-voltage supply polarity within a test routine, without turning the tester off
• Testing to JEDEC standard for IGBT, MOSFET, SCR, Diode and Bipolar parts and modules, including SiC devices
• Each 6U FSD module controls up to 8 DUT Test Cells; 10 FSD Modules per HT80 system, expandable in blocks of 80 DUT to 160, 240, 320
• HTRB and HTGB stress testing; operational modes include linear, switched, saturated, voltage breakdown and avalanche
• Temperature chamber rated at 60 to 225°C, +/-2°C with LN2 cooling; DUT temperature range from -40°C to +180°
• Electrical stresses removed within 30msec when a DUT starts to fail, preserving the part for failure mode analysis
• Test results written to an SQL Database for analysis and traceability

What it is bought for

Each of these sets out the bus, the clause and where programmes get caught out.

• Power Semiconductors (SiC / IGBT)high-voltage DC bias, hundreds to 1700 V class

Further reading

• H3TRB Testing: What Biased Humidity Asks of the Rig That Dry Heat Does Not
• JEDEC SiC Qualification by Document Number: The JC-70.2 Set
• HTRB Testing Explained: Bias, Temperature, Leakage and What the Rig Has to Guarantee