Testing power semiconductors (sic / igbt) to JEDEC JESD22 / JESD47
A JEDEC JESD22 / JESD47 campaign is not a measurement — it is a thousand hours of holding still. The subject is discrete SiC and IGBT devices, power modules; the stress is high-voltage DC bias, hundreds to 1700 V class; the result you are after is that the device survives 1000 hours of stress without parametric drift. Everything hinges on hours at temperature: drift in the bias is drift in the answer. Nothing here asks for AC waveform synthesis, which is why a bench source built for 400 Hz is the wrong instrument. What the rig needs is regulated high-voltage DC bias across 77+ devices per lot for 1000 h with per-device leakage monitoring and fail-isolation — one shorted die must not collapse bias on the rest — plus interim parametric reads at 168/500/1000 h.
What you are testing
- Device under test
- discrete SiC and IGBT devices, power modules
- Bus
- high-voltage DC bias, hundreds to 1700 V class
- Who buys this
- device makers and automotive qualification teams
What JEDEC JESD22 / JESD47 does not cover
- AC waveform synthesis
- 400 Hz
- grid ride-through
- harmonics
If your programme needs those, they come from a different standard and often different hardware.
The limits this test has to reproduce
Nothing about this is fast. It is bias accuracy held for a thousand hours across a lot of devices, with the discipline that one failure cannot disturb the rest.
| Parameter | Value | Clause |
|---|---|---|
| HTOL | Tj ≥125 °C, Vcc ≥ Vcc,max, 3 lots × 77 units, 1000 h, 0 fails | JESD47 |
| HTOL method | static or dynamic bias at max operating voltage, Tj 125–150 °C | JESD22-A108 |
| HTRB | Tj = Tj,max (150–175 °C for SiC), V_DS = 80% of rated blocking voltage, 1000 h | MIL-STD-750-1 M1038/M1039 + JEDEC practice |
| H3TRB / THB | 85 °C / 85% RH, reverse bias 80% of rated V capped at 100 V, 1000 h | JESD22-A101 / AEC-Q101 |
The clauses semiconductor programmes actually face, as published in JEDEC JESD22 / JESD47. See every limit in JEDEC JESD22 / JESD47. Certification work should be run against the published standard.
What decides the rig here
The requirements that separate a system that can run this programme from one that only meets the headline numbers.
One shorted die must not take the lot
Fail-isolation per device is the requirement that separates a reliability rig from a bench supply with a fan-out.
Bias accuracy is the acceleration variable
Error in the applied bias is error in the inferred lifetime. Nothing else in the rig matters as much.
Interim reads shape the data, not just the pass
168, 500 and 1000-hour checkpoints determine whether you can see drift coming or only its aftermath.
Equipment that covers it
Further reading on JEDEC JESD22 / JESD47
Send us the clauses you have to satisfy
We will come back with the source and load capability that covers them — and tell you plainly if something in your spec needs hardware we would not supply.
Talk to an engineer